Table 11-4 Flash Patch Remap Register Bit Assignments; Figure 11-3 Flash Patch Remap Register Bit Assignments; Figure 11-4 Flash Patch Comparator Registers Bit Assignments - ARM Cortex-M3 Technical Reference Manual

System Debug
11-10
Table 11-4 describes the fields of the Flash Patch Remap Register.
Field Name
[31:29] -
[28:5] REMAP
[4:0] -
Flash Patch Comparator Registers
Use the Flash Patch Comparator Registers to store the values to compare with the PC
address.
The register address, access type, and Reset state are:
Access Read/write
Address
0xE0002008
0xE0002020
Reset state Bit[0] (ENABLE) is reset to 1'b0.
Figure 11-4 shows the fields of the Flash Patch Comparator Registers.

Figure 11-4 Flash Patch Comparator Registers bit assignments

Table 11-5 describes the fields of the Flash Patch Comparator Registers.
Copyright © 2005, 2006 ARM Limited. All rights reserved.

Figure 11-3 Flash Patch Remap Register bit assignments

Table 11-4 Flash Patch Remap Register bit assignments

Definition
Reserved. Read as b001. Hardwires the remap to the system space.
Remap base address field.
Reserved. Read As Zero. Write Ignored.
, ,
0xE000200C 0xE0002010
,
0xE0002024
, ,
0xE0002014 0xE0002018
ARM DDI 0337B
, ,
0xE000201C