Table 8-10 Bit Functions Of The Interrupt Clear-Pending Registers; Table 8-11 Bit Functions Of The Active Bit Register - ARM Cortex-M3 Technical Reference Manual

Field Name
[31:0] CLRPEND
ARM DDI 0337B
The register address, access type, and Reset state are:
Address
0xE000E280
Access Read/write
Reset state
0x00000000
Table 8-10 describes the field of the Interrupt Clear-Pending Registers.

Table 8-10 Bit functions of the Interrupt Clear-Pending Registers

Definition
Interrupt clear-pending bits:
1 = clear pending interrupt
0 = do not clear pending interrupt.
Writing 0 to a CLRPEND bit has no effect. Reading the bit returns its current state.
Active Bit Register
Read the Active Bit Register to determine which interrupts are active. Each flag in the
register corresponds to one of the 32 interrupts.
The register address, access type, and Reset state are:
Address
0xE000E300
Access Read-only
Reset state
0x00000000
Table 8-11 describes the field of the Active Bit Register.
Interrupt Priority Registers
Use the Interrupt Priority Registers to assign a priority from 0 to 255 to each of the
available interrupts. 0 is the highest priority, and 255 is the lowest.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
-
0xE000E29C
-
0xE00031C

Table 8-11 Bit functions of the Active Bit Register

Field Name Definition
[31:0] ACTIVE Interrupt active flags:
1 = interrupt active or preempted and stacked
0 = interrupt not active or stacked.
Nested Vectored Interrupt Controller
8-15