Table 1-2 32-Bit Cortex-M3 Instruction Summary - ARM Cortex-M3 Technical Reference Manual

Introduction
Operation
Subtract register values
Subtract 4 (immediate 7-bit value) from SP
Operating system service call with 8-bit immediate call code
Extract byte [7:0] from register, move to register, and sign-extend to 32 bits
Extract halfword [15:0] from register, move to register, and sign-extend to 32
bits
Test register value for set bits by ANDing it with another register value
Extract byte [7:0] from register, move to register, and zero-extend to 32 bits
Extract halfword [15:0] from register, move to register, and zero-extend to 32 bits
Wait for event
Wait for interrupt
Operation
Add register value, immediate 12-bit value, and C bit
Add register value, shifted register value, and C bit
Add register value and immediate 12-bit value
Add register value and shifted register value
Add register value and immediate 12-bit value
Bitwise AND register value with immediate 12-bit value
Bitwise AND register value with shifted register value
Arithmetic shift right by number in register
Conditional branch
Clear bit field
Insert bit field from one register value into another
1-16
Table 1-1 16-bit Cortex-M3 instruction summary (continued)
Table 1-2 lists the 32-bit Cortex-M3 instructions.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Assembler
SUB <Rd>, <Rn>, <Rm>
SUB SP, #<immed_7> * 4
SVC <immed_8>
SXTB <Rd>, <Rm>
SXTH <Rd>, <Rm>
TST <Rn>, <Rm>
UXTB <Rd>, <Rm>
UXTH <Rd>, <Rm>
WFE <c>
WFI <c>

Table 1-2 32-bit Cortex-M3 instruction summary

Assembler
ADC{S}.W <Rd>, <Rn>, #<modify_constant(immed_12>
ADC{S}.W <Rd>, <Rn>, <Rm>{, <shift>}
ADD{S}.W <Rd>, <Rn>, #<modify_constant(immed_12)>
ADD{S}.W <Rd>, <Rm>{, <shift>}
ADDW.W <Rd>, <Rn>, #<immed_12>
AND{S}.W <Rd>, <Rn>, #<modify_constant(immed_12>
AND{S}.W <Rd>, <Rn>, Rm>{, <shift>}
ASR{S}.W <Rd>, <Rn>, <Rm>
B{cond}.W <label>
BFC.W <Rd>, #<lsb>, #<width>
BFI.W <Rd>, <Rn>, #<lsb>, #<width>
ARM DDI 0337B