Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1454

VBUS Events
Actions as an A Device
VBUS >VBUS Valid with session initiated by USB controller. VBUS level indicator = b#11 and the session bit is set.
When VBUS is greater than VBUS valid, the USB controller selects host mode and waits for a device to connect. It
then generates a connect interrupt. The processor resets and enumerates the connected B device.
VBUS > Session valid with session initiated by B device. VBUS level indicator = b#10 and the session bit is clear.
When VBUS is greater than session valid, the USB controller generates a session request interrupt. The processor
sets the session bit. The USB controller either stays in host mode or changes to peripheral mode, depending upon
the state of the pull-up resistor on the B device. For more information, refer to the host negotiation protocol of the
OTG specification. The state of the host mode bit indicates the selected mode.
VBUS below VBUS Valid while the Session bit remains set. VBUS level indicator b#11 and the session bit is set.
This event indicates a problem with the VBUS power level. For example, the battery power could have dropped too
low to sustain VBUS valid. Or, the B device could be drawing more current than the A device can provide. In either
case, the USB controller automatically terminates the session and generates a VBUS error interrupt.
To recover from this VBUS error condition, the processor must take the following actions inside the VBUS error
interrupt handler.
• Turn off VBUS and wait until the USB_DEV_CTL.VBUS reads b#01.
• Turn on VBUS and wait until the USB_DEV_CTL.VBUS reads b#11.
• Set the USB_DEV_CTL.SESSION bit
The USB_DEV_CTL.VBUS bit field indicates the VBUS level.
Because VBUS is sourced external to the processor, make sure that the hardware design connects a GPIO
NOTE:
or the dedicated DrvVBUS signal to the external source. Then, the software can be used to turn VBUS on
and off.
Actions as a B Device
VBUS > Session Valid. VBUS level indicator = b#10 and session bit is clear. This event indicates activity from the A
device. The USB controller sets the session bit and disconnects the pull down resistor on the D+ line.
VBUS < Session Valid. While the session bit remains set, VBUS level indicator = b#01 and session bit is set. This
event indicates that the A device has lost power (or become disconnected). The USB controller clears the session bit
and generates a disconnect interrupt. The processor ends the session.
VBUS < Session End. VBUS level indicator = b#00. This event is the condition under which a B device can initiate a
session request. If the session bit is set, then after 2 ms of SE0 on the bus, the USB controller starts SRP by first
pulsing the data line, then pulsing the USB_VBUS signal.
Host Mode Reset
If the USB_POWER.RESET is set while the USB controller is in host mode, the USB controller generates reset
signaling on the bus. The processor core must keep this bit set for 20 ms to ensure correct resetting of the target
device. After the processor core clears the bit, the USB controller starts its frame counter and transaction scheduler.
27–42 ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference