Table of Contents
Advertisement
16.3
Branch status interface
ARM DDI 0337B
The branch status signal, BRCHSTAT, gives fetch time information about the opcode
in decode and the next execute.
Figure 16-1 and Figure 16-2 show a conditional branch backwards not taken and taken.
The branch occurs speculatively in the decode phase of the opcode. The branch target
is a halfword unaligned 16-bit opcode.
Note
HADDRICore and HTRANSICore are the address and transaction request signals
from the processor, and not the signals on the external Cortex-M3 interface.
Figure 16-3 on page 16-6 and Figure 16-4 on page 16-6 show a conditional branch
forwards not taken and taken. The branch occurs speculatively in the decode phase of
the opcode. The branch target is a halfword unaligned 16-bit opcode.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
Figure 16-1 Conditional branch backwards not taken
Figure 16-2 Conditional branch backwards taken
Embedded Trace Macrocell Interface
16-5
Advertisement
Table of Contents
