Table 2-4 Register 13, Trace Process Identifier; Table 2-5 Register 15, Test Register Map; Table 2-7 Bist Control Register - ARM ARM966E-S Technical Reference Manual

2.3.5 Register 13, Trace process identifier
2.3.6 Register 15, Test
Register
Trace Control Register
BIST control register
Instruction BIST address register
Instruction BIST general register
Data BIST address register
Data BIST general register
ARM DDI 0186A
This stalls the processor core until any outstanding accesses in the write buffer have
been completed, that is, until all data has been written to external memory.
This register provides a mechanism to allow the Real-time Trace tools to identify the
currently executing process in multi-tasking environments.
The contents of this register are replicated on the ETMPROCID pins of the
ARM966E-S. The ETMPROCIDWR signal is set HIGH for a single clock cycle
whenever this register is written to. Table 2-4 shows the trace process identifier for read
and write.
Register
Trace Process Identifier
This register provides access to:
• the tightly-coupled Instruction and Data SRAM test features
• the trace control features.
Both features are supported by the ARM966E-S.
The register map for CP15 register 15 is shown in Table 2-5.
Read
MRC p15, 1, Rd, c15, c1, 0
MRC p15, 1, Rd, c15, c0, 1
MRC p15, 1, Rd, c15, c0, 2
MRC p15, 1, Rd, c15, c0, 3
MRC p15, 1, Rd, c15, c0, 6
MRC p15, 1, Rd, c15, c0, 7
Copyright © 2000 ARM Limited. All rights reserved.

Table 2-4 Register 13, Trace process identifier

Read
MRC p15,0,Rd,c13,c1,1

Table 2-5 Register 15, Test register map

Write
MCR p15, 1, Rd, c15, c1, 0
MCR p15, 1, Rd, c15, c0, 1
MCR p15, 1, Rd, c15, c0, 2
MCR p15, 1, Rd, c15, c0, 3
MCR p15, 1, Rd, c15, c0, 6
MCR p15, 1, Rd, c15, c0, 7
Programmer's Model
Write
MCR p15,0,Rd,c13,c1,1
2-9