ST STM32L4+ Series Reference Manual page 590

Octo-SPI interface (OCTOSPI)
19.6.8 OCTOSPI data length register (OCTOSPI_DLR)
Address offset: 0x0040
Reset value: 0x0000 0000
31 30 29 28
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15 14 13 12
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Bits 31:0 DL[31: 0]: Data length
Number of data to be retrieved (value+1) in Indirect and Status-polling modes. A value not
greater than 3 (indicating 4 bytes) must be used for status polling-mode.
All 1s in Indirect mode means undefined length, where OCTOSPI continues until the end of
the memory, as defined by DEVSIZE.
0x0000_0000: 1 byte is to be transferred.
0x0000_0001: 2 bytes are to be transferred.
0x0000_0002: 3 bytes are to be transferred.
0x0000_0003: 4 bytes are to be transferred.
...
0xFFFF_FFFD: 4,294,967,294 (4G-2) bytes are to be transferred.
0xFFFF_FFFE: 4,294,967,295 (4G-1) bytes are to be transferred.
0xFFFF_FFFF: undefined length; all bytes, until the end of the external device, (as defined
by DEVSIZE) are to be transferred. Continue reading indefinitely if DEVSIZE = 0x1F.
DL[0] is stuck at 1 in Dual-quad mode (DQM = 1) even when 0 is written to this bit, thus
assuring that each access transfers an even number of bytes.
This field has no effect when in Memory-mapped mode (FMODE = 10).
This field can be written only when BUSY = 0.
19.6.9 OCTOSPI address register (OCTOSPI_AR)
Address offset: 0x0048
Reset value: 0x0000 0000
31 30 29 28
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15 14 13 12
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Bits 31:0 ADDRESS[31:0]: Address
Address to be sent to the external device. In HyperFlash mode, this field must be even as
this protocol is 16-bit word oriented. Writes to this field are ignored when BUSY = 1 or when
FMODE = 11 (Memory-mapped mode).
590/2301
27 26 25 24
DL[31:16]
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11 10 9 8
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27 26 25 24
ADDRESS[31:16]
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11 10 9 8
ADDRESS[15:0]
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RM0432 Rev 6
23 22 21
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7 6 5
DL[15:0]
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23 22 21
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7 6 5
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20 19 18 17
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4 3 2 1
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20 19 18 17
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4 3 2 1
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RM0432
16
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0
rw
16
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0
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