ST STM32L4+ Series Reference Manual page 285

RM0432
Bit 21 SAI1RST: Serial audio interface 1 (SAI1) reset
Bits 20:19 Reserved, must be kept at reset value.
Bit 18 TIM17RST: TIM17 timer reset
Bit 17 TIM16RST: TIM16 timer reset
Bit 16 TIM15RST: TIM15 timer reset
Bit 15 Reserved, must be kept at reset value.
Bit 14 USART1RST: USART1 reset
Bit 13 TIM8RST: TIM8 timer reset
Bit 12 SPI1RST: SPI1 reset
Bit 11 TIM1RST: TIM1 timer reset
Bits 10:1 Reserved, must be kept at reset value.
Bit 0 SYSCFGRST: SYSCFG + COMP + VREFBUF reset
Set and cleared by software.
0: No effect
1: Reset SAI1
Set and cleared by software.
0: No effect
1: Reset TIM17 timer
Set and cleared by software.
0: No effect
1: Reset TIM16 timer
Set and cleared by software.
0: No effect
1: Reset TIM15 timer
Set and cleared by software.
0: No effect
1: Reset USART1
Set and cleared by software.
0: No effect
1: Reset TIM8 timer
Set and cleared by software.
0: No effect
1: Reset SPI1
Set and cleared by software.
0: No effect
1: Reset TIM1 timer
0: No effect
1: Reset SYSCFG + COMP + VREFBUF
RM0432 Rev 6
Reset and clock control (RCC)
285/2301
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