ST STM32L4+ Series Reference Manual page 923

RM0432
Table 197. LTDC register map and reset values (continued)
Offset Register name
LTDC_L2WVPCR
0x010C
Reset value
LTDC_L2CKCR
0x0110
Reset value
LTDC_L2PFCR
0x0114
Reset value
LTDC_L2CACR
0x0118
Reset value
LTDC_L2DCCR
0x011C
Reset value
LTDC_L2BFCR
0x0120
Reset value
LTDC_L2CFBAR
0x012C
Reset value
LTDC_L2CFBLR
0x0130
Reset value
LTDC_L2CFBLNR
0x0134
Reset value
LTDC_L2CLUTWR
0x0144
Reset value
Refer to
WVSPPOS[10:0]
0 0 0 0
0
DCALPHA[7:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
CFBP[12:0]
0 0 0 0 0 0
CLUTADD[7:0]
0 0 0 0 0 0 0 0 0
Section 2.2 on page 91
0 0 0 0 0 0 0
CKRED[7:0]
0 0 0 0 0 0 0 0 0
DCRED[7:0]
0 0 0 0 0 0 0 0 0
CFBADD[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0
RED[7:0]
0 0 0 0 0 0 0 0 0
for the register boundary addresses.
RM0432 Rev 6
LCD-TFT display controller (LTDC)
WVSTPOS[10:0]
0 0 0 0 0
CKGREEN[7:0]
0 0 0 0 0 0 0 0
1 1
DCGREEN[7:0]
0 0 0 0 0 0 0 0
BF1[2:0]
1 1 0
0 0 0 0 0 0 0 0
CFBLL[12:0]
0 0 0 0 0 0 0
CFBLNBR[10:0]
0 0 0 0 0
GREEN[7:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0
CKBLUE[7:0]
0 0 0 0 0 0
PF[2:0]
0 0 0
CONSTA[7:0]
1 1 1 1 1 1
DCBLUE[7:0]
0 0 0 0 0 0
BF2[2:0]
1 1 1
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
BLUE[7:0]
0 0 0 0 0 0
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