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ST STM32L4+ Series Reference Manual page 269

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RM0432
Bits 14:8 PLLSAI1N[6:0]: PLLSAI1 multiplication factor for VCO
Caution:
Bits 7:4 PLLSAI1M: Division factor for PLLSAI1 input clock
Set and reset by software to divide the PLLSAI1 input clock before the VCO.
These bits can be written only when PLLSAI1 is disabled.
VCO input frequency = PLLSAI1 input clock frequency / PLLSAI1M with 1 <= PLLSAI1M <= 16
Caution:
Bits 3:0 Reserved, must be kept at reset value.
Set and cleared by software to control the multiplication factor of the VCO. These bits can be
written only when the PLLSAI1 is disabled.
VCOSAI1 output frequency = VCOSAI1 input frequency x PLLSAI1N
with 8 =< PLLSAI1N =< 127
0000000: PLLSAI1N = 0 wrong configuration
0000001: PLLSAI1N = 1 wrong configuration
...
0000111: PLLSAI1N = 7 wrong configuration
0001000: PLLSAI1N = 8
0001001: PLLSAI1N = 9
...
1111111: PLLSAI1N = 127
The software has to set correctly these bits to ensure that the VCO
output frequency is between 64 and 344 MHz.
0000: PLLSAI1M = 1
0001: PLLSAI1M = 2
0010: PLLSAI1M = 3
0011: PLLSAI1M = 4
0100: PLLSAI1M = 5
0101: PLLSAI1M = 6
0110: PLLSAI1M = 7
0111: PLLSAI1M = 8
1000: PLLSAI1M = 9
...
1111: PLLSAI1M= 16
The software has to set these bits correctly to ensure that the VCO input
frequency ranges from 2.66 to 8 MHz.
RM0432 Rev 6
Reset and clock control (RCC)
269/2301
320

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