ST STM32L4+ Series Reference Manual page 291

RM0432
Bit 25 CAN1EN: CAN1 clock enable
Bit 24 CRSEN: Clock Recovery System clock enable
0: CRS clock disabled
1: CRS clock enabled
Bit 23 I2C3EN: I2C3 clock enable
Bit 22 I2C2EN: I2C2 clock enable
Bit 21 I2C1EN: I2C1 clock enable
Bit 20 UART5EN: UART5 clock enable
Bit 19 UART4EN: UART4 clock enable
Bit 18 USART3EN: USART3 clock enable
Bit 17 USART2EN: USART2 clock enable
Bit 16 Reserved, must be kept at reset value.
Bit 15 SPI3EN: SPI3 clock enable
Bit 14 SPI2EN: SPI2 clock enable
Bits 13:12 Reserved, must be kept at reset value.
Set and cleared by software.
0: CAN1 clock disabled
1: CAN1 clock enabled
Set and cleared by software
Set and cleared by software.
0: I2C3 clock disabled
1: I2C3 clock enabled
Set and cleared by software.
0: I2C2 clock disabled
1: I2C2 clock enabled
Set and cleared by software.
0: I2C1 clock disabled
1: I2C1 clock enabled
Set and cleared by software.
0: UART5 clock disabled
1: UART5 clock enabled
Set and cleared by software.
0: UART4 clock disabled
1: UART4 clock enabled
Set and cleared by software.
0: USART3 clock disabled
1: USART3 clock enabled
Set and cleared by software.
0: USART2 clock disabled
1: USART2 clock enabled
Set and cleared by software.
0: SPI3 clock disabled
1: SPI3 clock enabled
Set and cleared by software.
0: SPI2 clock disabled
1: SPI2 clock enabled
RM0432 Rev 6
Reset and clock control (RCC)
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