ST STM32L4+ Series Reference Manual page 452

Chrom-ART Accelerator controller (DMA2D)
Table 73. DMA2D register map and reset values (continued)
Offset Register
DMA2D_OCOLR
0x0038
Reset value
DMA2D_OMAR
0x003C
Reset value
DMA2D_OOR
0x0040
Reset value
DMA2D_NLR
0x0044
Reset value
DMA2D_LWR
0x0048
Reset value
DMA2D_AMTCR
0x004C
Reset value
0x0050-
Reserved
0x03FC
DMA2D_FGCLUT
0x0400-
0x07FC
Reset value
DMA2D_BGCLUT
0x0800-
0x0BFC
Reset value
Refer to
452/2301
ALPHA[7:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
PL[13:0]
0 0 0 0 0 0
ALPHA<y>[7:0]
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
ALPHA<y>[7:0]
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
Section 2.2 on page 91
RED[7:0]
A
ALPHA[3:0]
0 0 0 0 0 0 0 0 0
MA[31:0]
0 0 0 0 0 0 0 0 0
0
0 0 0 0 0 0 0 0 0
0
0
Reserved
RED<y>[7:0]
RED<y>[7:0]
for the register boundary addresses.
RM0432 Rev 6
GREEN[7:0]
RED[4:0] GREEN[5:0]
RED[4:0] GREEN[4:0]
RED[3:0] GREEN[3:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
LO[15:0]
0 0 0 0 0 0 0 0 0
NL[15:0]
0 0 0 0 0 0 0 0 0
LW[15:0]
0 0 0 0 0 0 0 0 0
DT[7:0]
0 0 0 0 0 0 0
GREEN<y>[7:0]
GREEN<y>[7:0]
RM0432
BLUE[7:0]
BLUE[4:0]
BLUE[4:0]
BLUE[3:0]
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0
BLUE<y>[7:0]
BLUE<y>[7:0]