ST STM32L4+ Series Reference Manual page 614

Analog-to-digital converters (ADC)
•
Conversion modes
–
–
–
–
•
Dual ADC mode for ADC1 and 2
•
Interrupt generation at ADC ready, the end of sampling, the end of conversion (regular
or injected), end of sequence conversion (regular or injected), analog watchdog 1, 2 or
3 or overrun events
•
3 analog watchdogs per ADC
• ADC input range: V
Figure 88
21.3 ADC implementation
Dual mode
DFSDM interface
SMPPLUS control
1. Available only on STM32L4Q5xx and STM32L4P5xx.
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Each ADC can convert a single channel or can scan a sequence of channels
Single mode converts selected inputs once per trigger
Continuous mode converts selected inputs continuously
Discontinuous mode
≤ V
REF–
shows the block diagram of one ADC.
Table 125. Main ADC features
References
(1)
≤ V
IN REF+
RM0432 Rev 6
ADC1 ADC2
(1)
X
X
X
RM0432
(1)
X
X
X