ST STM32L4+ Series Reference Manual page 207

RM0432
Low-power sleep-now
Mode entry
Mode exit
Wakeup latency
5.3.6 Stop 0 mode
The Stop 0 mode is based on the Cortex
peripheral clock gating. The voltage regulator is configured in main regulator mode. In Stop
0 mode, all clocks in the V
HSE oscillators are disabled. Some peripherals with the wakeup capability (I2Cx (x=1,2,3),
U(S)ARTx(x=1,2...5) and LPUART) can switch on the HSI16 to receive a frame, and switch
off the HSI16 after receiving the frame if it is not a wakeup frame. In this case, the HSI16
clock is propagated only to the peripheral requesting it.
SRAM1, SRAM2, SRAM3 and register contents are preserved.
The BOR is always available in Stop 0 mode. The consumption is increased when
thresholds higher than V
I/O states in Stop 0 mode
In the Stop 0 mode, all I/O pins keep the same state as in the Run mode.
Entering the Stop 0 mode
The Stop 0 mode is entered according
SLEEPDEEP bit in the Cortex
mode
Low-power sleep mode is entered from the Low-power run mode.
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– SLEEPDEEP = 0
– No interrupt (for WFI) or event (for WFE) is pending
Refer to the Cortex
Low-power sleep mode is entered from the Low-power run mode.
On return from ISR while:
– SLEEPDEEP = 0 and
– SLEEPONEXIT = 1
– No interrupt is pending
Refer to the Cortex
If WFI or Return from ISR was used for entry
Interrupt: refer to
table
If WFE was used for entry and SEVONPEND = 0:
Wakeup event: refer to
If WFE was used for entry and SEVONPEND = 1:
Interrupt even when disabled in NVIC: refer to
and STM32L4Sxxx vector table
Wakeup event: refer to
After exiting the Low-power sleep mode, the MCU is in Low-power run
mode.
None
CORE
BOR0
®
Table 30. Low-power sleep
®
-M4 System Control register.
®
-M4 System Control register.
Table 76: STM32L4Rxxx and STM32L4Sxxx vector
Section 16.3.2: Wakeup event management
Section 16.3.2: Wakeup event management
®
-M4 Deepsleep mode combined with the
domain are stopped; the PLL, the MSI, the HSI16 and the
are used.
Section : Entering low-power
-M4 System Control register is set.
RM0432 Rev 6
Power control (PWR)
Description
Table 76: STM32L4Rxxx
mode, when the
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