ST STM32L4+ Series Reference Manual page 885

RM0432
Table 191. DFSDM register map and reset values (continued)
Register
Offset
name
DFSDM_
FLT0JDATAR
0x118
reset value 0
DFSDM_
FLT0RDATAR
0x11C
reset value 0
DFSDM_
FLT0AWHTR
0x120
reset value 0
DFSDM_
FLT0AWLTR
0x124
reset value 0
DFSDM_
FLT0AWSR
0x128
reset value
DFSDM_
FLT0AWCFR
0x12C
reset value
DFSDM_
FLT0EXMAX
0x130
reset value 1
DFSDM_
FLT0EXMIN
0x134
reset value 0
DFSDM_
FLT0CNVTIMR
0x138
reset value 0
0x13C -
Reserved
0x17C
DFSDM_
FLT1CR1
0x180
reset value
DFSDM_
FLT1CR2
0x184
reset value
DFSDM_
FLT1ISR
0x188
reset value
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0
RCH[2:0]
0 0 0 0 0
0 0
Digital filter for sigma delta modulators (DFSDM)
JDATA[23:0]
0 0 0 0 0 0 0 0
RDATA[23:0]
0 0 0 0 0 0 0 0
AWHT[23:0]
0 0 0 0 0 0 0 0
AWLT[23:0]
0 0 0 0 0 0 0 0
0 0
CLRAWHTF[7:0]
0 0
EXMAX[23:0]
0 0 0 0 0 0 0 0
EXMIN[23:0]
1 1 1 1 1 1 1 1
CNVCNT[27:0]
0 0 0 0 0 0 0 0
0 0 0 0 0
AWDCH[7:0]
0 0 0 0 0 0 0 0
0
RM0432 Rev 6
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
AWHTF[7:0]
0 0 0 0 0 0 0 0 0
CLRAWLTF[7:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
1 1 1 1 1 1
0 0 0 0 0 0 0 0 0
JEXTSEL[4:0]
0 0 0 0 0 0 0
EXCH[7:0]
0 0 0 0 0 0
0
0 0 0
RDATA
CH[2:0]
0 0 0 0
BKAWH[3:0]
0 0 0 0
BKAWL[3:0]
0 0 0 0
AWLTF[7:0]
0 0 0 0 0
0 0 0 0 0
0 0 0
0 0 0
0
0 0 0 0
0 0 0 0 0
0 0 0 0 0
885/2301
889