ST STM32L4+ Series Reference Manual page 199

RM0432
Mode name Entry
LPMS="000" +
SLEEPDEEP bit
Stop 0
+ WFI or Return
from ISR or WFE
LPMS="001" +
SLEEPDEEP bit
Stop 1
+ WFI or Return
from ISR or WFE
LPMS="010" +
SLEEPDEEP bit
Stop 2
+ WFI or Return
from ISR or WFE
LPMS="011"+
Set RRS[1:0] bits
Standby with
to "10" +
SRAM2
SLEEPDEEP bit
(2)
4 Kbytes
+ WIFI or Return
from ISR or WFE
LPMS="011"+
Set RSS bit for
STM32L4Rxxx
and
STM32L4Sxxx
devices and set
RSS[1:0] bits to
Standby with
"01" for
SRAM2
STM32L4P5xx
64 Kbytes
and
STM32L4Q5xx
devices +
SLEEPDEEP bit
+ WFI or Return
from ISR or WFE
LPMS="011" +
Clear RRS bit +
SLEEPDEEP bit
Standby
+ WFI or Return
from ISR or WFE
LPMS="1--" +
SLEEPDEEP bit
Shutdown
+ WFI or Return
from ISR or WFE
1. Refer to Table 27: Functionalities depending on the working
2. SRAM2 4 Kbytes retention in Standby mode is only available for STM32L4P5xx and STM32L4Q5xx devices.
Table 26. Low-power mode summary (continued)
Wakeup
(1)
source
Any EXTI line
(configured in the
EXTI registers)
Specific
peripherals
events
WKUP pin edge,
RTC event,
external reset in
NRST pin, IWDG
reset
WKUP pin edge,
RTC event,
external reset in
NRST pin,
IWDG reset
WKUP pin edge,
RTC event,
external reset in
NRST pin,
IWDG reset
WKUP pin edge,
RTC event,
external reset in
NRST pin
RM0432 Rev 6
Wakeup
Effect on clocks
system clock
HSI16 when
STOPWUCK=1 in
RCC_CFGR
MSI with the
frequency before
entering the Stop
mode when
STOPWUCK=0.
All clocks OFF except
LSI and LSE
MSI from 1 MHz
up to 8 MHz
All clocks OFF except
MSI 4 MHz
LSE
mode.
Power control (PWR)
Voltage
regulators
MR LPR
ON
ON
OFF
OFF OFF
OFF OFF
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