ST STM32L4+ Series Reference Manual page 762

Digital-to-analog converter (DAC)
Table 151. DAC register map and reset values (continued)
Register
Offset
name
DAC_CCR
0x38
Reset value
DAC_MCR
0x3C
Reset value
DAC_
SHSR1
0x40
Reset value
DAC_
SHSR2
0x44
Reset value
DAC_
SHHR
0x48
Reset value
DAC_
SHRR
0x4C
Reset value
Refer to
762/2301
THOLD2[9:0]
0 0 0 0
0 0
Section 2.2 on page 91
OTRIM2[4:0]
X X X X X
MODE2
[2:0]
0 0 0
0 0 0 0 0 1
TREFRESH2[7:0]
0 0 0 0 0 1
for the register boundary addresses.
RM0432 Rev 6
RM0432
OTRIM1[4:0]
X X X
MODE1
[2:0]
0
TSAMPLE1[9:0]
0 0 0 0 0 0 0 0
TSAMPLE2[9:0]
0 0 0 0 0 0 0 0
THOLD1[9:0]
0 0 0 0 0 0 0 0
TREFRESH1[7:0]
0 0 0 0 0 0
X X
0 0
0 0
0 0
0 1
0 1