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ST STM32L4+ Series Reference Manual page 542

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Flexible static memory controller (FSMC)
16-bit NAND Flash memory
FMC signal name
NOE(= NRE)
NWAIT/INT
Theoretically, there is no capacity limitation as the FMC can manage as many address
cycles as needed.
542/2301
Table 115. 16-bit NAND Flash
I/O
A[17]
O
A[16]
O
D[15:0]
I/O
NCE
O
O
NWE
O
I
NAND Flash address latch enable (ALE) signal
NAND Flash command latch enable (CLE) signal
16-bit multiplexed, bidirectional address/data bus
Chip select
Output enable (memory signal name: read enable, NRE)
Write enable
NAND Flash ready/busy input signal to the FMC
RM0432 Rev 6
Function
RM0432

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