ST STM32L4+ Series Reference Manual page 1087

RM0432 True random number generator (RNG) applied to STM32L4P5xx and STM32L4Q5xx only
Interrupt acronym
RNG
The user can enable or disable the above interrupt sources individually by changing the
mask bits or the general interrupt control bit IE in the RNG_CR register. The status of the
individual interrupt sources can be read from the RNG_SR register.
Note: Interrupts are generated only when RNG is enabled.
33.5 RNG processing time
In NIST compliant configuration, the time between two sets of four 32-bit data is either:
•
412 AHB cycles if f
•
256 RNG cycles f
With f
threshold
Note: When CLKDIV is different from zero, f
Table 222. RNG interrupt requests
Interrupt event Event flag
Data ready flag
Seed error flag
Clock error flag
< f
AHB threshold
≥ f
AHB threshold
= 1.6 x f , e.g. 77 MHz if f
AHB
Enable control bit
DRDY IE
SEIS IE
CEIS IE
(conditioning stage is limiting), or
(noise source stage is limiting).
= 48 MHz.
RNG
must take into account the internal divider ratio.
RNG
RM0432 Rev 6
Interrupt clear method
None (automatic)
Write 0 to SEIS or write
CONDRST to 1 then to 0
Write 0 to CEIS
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