ST STM32L4+ Series Reference Manual page 603

RM0432
Table 122. OCTOSPI register map and reset values (continued)
Offset Register
OCTOSPI_IR
0x0110
Reset value
0x0114
Reserved
-0x011C
OCTOSPI_ABR
0x0120
Reset value
0x0124
- Reserved
0x012C
OCTOSPI_LPTR
0x0130
Reset value
0x0134
- Reserved
0x0200
OCTOSPI_WCCR
0x0180
Reset value
OCTOSPI_WTCR
0x0188
Reset value
0x018C Reserved
OCTOSPI_WIR
0x0190
Reset value
0x0194
- Reserved
0x019C
OCTOSPI_WABR
0x01A0
Reset value
0x01A4
- Reserved
0x01FC
OCTOSPI_HLCR
0x0200
Reset value
Refer to
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Section 2.2 on page 91
INSTRUCTION[31:0]
0 0 0 0 0 0 0 0 0
ALTERNATE[31:0]
0 0 0 0 0 0 0 0 0
0
0 0 0 0 0 0
INSTRUCTION[31:0]
0 0 0 0 0 0 0 0 0
ALTERNATE[31:0]
0 0 0 0 0 0 0 0 0
TRWR[7:0]
0 0 0 0 0 0 0 0 0
for the register boundary addresses.
RM0432 Rev 6
Octo-SPI interface (OCTOSPI)
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
TIMEOUT[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
TACC[7:0]
0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
DCYC[4:0]
0 0 0 0 0 0
0 0 0 0 0 0
0 0
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