ST STM32L4+ Series Reference Manual page 731

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DAC trigger selection

If the TENx control bit is set, the conversion can then be triggered by an external event (timer

counter, external interrupt line). The TSELx[3:0] control bits determine which out of 16 pos-

sible events triggers the conversion as shown in TSELx[3:0] bits of the DAC_CR register.

These events can be either the software trigger or hardware triggers. Refer to

Each time a DAC interface detects a rising edge on the selected trigger source (refer to the

table below), the last data stored into the DAC_DHRx register are transferred into the

DAC_DORx register. The DAC_DORx register is updated three APB1 cycles after the

trigger occurs.

If the software trigger is selected, the conversion starts once the SWTRIG bit is set.

SWTRIG is reset by hardware once the DAC_DORx register has been loaded with the

DAC_DHRx register contents.

TSELx[3:0] bit cannot be changed when the ENx bit is set.

When software trigger is selected, the transfer from the DAC_DHRx register to the

DAC_DORx register takes only one APB1 clock cycle.

Table 146. DAC trigger selection

RM0432 Rev 6

Digital-to-analog converter (DAC)

Software control bit

Internal signal from on-chip timers

External pin

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