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ST STM32L4+ Series Reference Manual page 943

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RM0432
If that counter reaches the value defined by the Low-Power Reception Timeout Counter
(LPRX_TOCNT) field of the DSI Host Timeout Counter Configuration Register 1
(DSI_TCCR0), the Timeout Low-Power Reception (TOLPRX) bit in the DSI Host Interrupt
and Status Register 1 (DSI_ISR1) is asserted and an internal soft reset is generated to the
DSI Host.
If the Timeout Low-Power Reception Interrupt Enable (TOLPRXIE) bit of the DSI Host
Interrupt Enable Register 1 (DSI_IER1) is set, an interrupt is generated. Once the software
gets notified by the interrupt, it must reset the D-PHY by de-asserting and asserting the
Digital Enable (DEN) bit of the DSI Host PHY Control Register (DSI_PCTLR).
30.8.2
Peripheral response timeout counters
A peripheral may not immediately respond correctly to some received packets. For
example, a peripheral receives a read request, but due to its architecture cannot access the
RAM for a while. It may be because the panel is being refreshed and takes some time to
respond. In this case, set a timeout to ensure that the host waits long enough so that the
device is able to process the previous data before receiving the new data or responding
correctly to new requests.
Table 201
peripheral response.
Table 201. List of events of different categories of the PRESP_TO counter
Items implying a BTA PRESP_TO
READ requests indicating a PRESP_TO
(replicated for HS and LP)
WRITE requests indicating a PRESP_TO
(replicated for HS and LP)
The DSI Host ensures that, on sending an event that triggers a timeout, the D-PHY switches
to the Stop state and a counter starts running until it reaches the value of that timeout. The
link remains in the LP-11 state and unused until the timeout ends, even if there are other
events ready to be transmitted.
Figures
215
categories listed in
DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
lists the events belonging to various categories having an associated timeout for
Category
to
217
illustrate the flow of counting in the PRESP_TO counter for the three
Table
201.
Bus Turn-Around
(0x04) Generic read, no parameters short
(0x14) Generic read, 1 parameter short
(0x24) Generic read, 2 parameters short
(0x06) DCS read, no parameters short
(0x03) Generic short write, no parameters short
(0x13) Generic short write, 1 parameter short
(0x23) Generic short write, 2 parameters short
(0x29) Generic long write long
(0x05) DCS short write, no parameters short
(0x15) DCS short write, 1 parameter short
(0x39) DCS long write/write_LUT, Command packet long
(0x37) Set maximum return packet size
RM0432 Rev 6
Event
943/2301
1044

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