RM0432 True random number generator (RNG) applied to STM32L4P5xx and STM32L4Q5xx only
After enabling the RNG (RNGEN=1 in RNG_CR) the following chain of events occurs:
1.
The analog noise source is enabled, and by default the RNG waits 16 cycles of RNG
clock cycles (before divider) before starting to sample analog output and filling 128-bit
conditioning shift register.
2.
The conditioning hardware initializes, automatically triggering start-up behavior test on
the raw data samples and known-answer tests.
3.
When start-up health tests are completed. During this time three 128-bit noise source
samples are used.
4.
The conditioning stage internal input data buffer is filled again with 128-bit and a
number of conditioning rounds defined by the RNG configuration (NIST or non-NIST) is
performed. The output buffer is then filled with the post processing result.
5.
The output buffer is refilled automatically according to the RNG usage.
The associated initialization time can be found in
Software reset
Figure 251
a)
b)
c)
Figure 251. RNG initialization overview
1
Wait for noise
2
Start-up heath tests
3
Conditioning keys
4
Generate samples
also highlights a possible software reset sequence, implemented by:
Writing bits RNGEN=0 and CONDRST=1 in the RNG_CR register with the same
RNG configuration and a new CLKDIV if needed.
Then writing RNGEN=1 and CONDRST=0 in the RNG_CR register.
Wait for random number to be ready, after initialization completes
Section 33.5: RNG processing
source
start-up test(s)
continuous test(s)
init
5
RM0432 Rev 6
Software reset
Error state
not OK
not OK
time.
MSv44204V2
1083/2301
1093
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