ST STM32L4+ Series Reference Manual page 972

DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
DSI host interrupt
Bit
& Status register
1 12
1 11
1 10
1 9
1 8
1 7
1 6
972/2301
Table 209. Error causes and recovery (continued)
Name Cause of the error
An overflow occurs in the
GPRXE
Generic read FIFO.
An underflow occurs in the
GPRDE
Generic read FIFO.
An underflow occurs in the
GPTXE
Generic write payload FIFO.
An overflow occurs in the
GPWRE
Generic write payload FIFO.
An overflow occurs in the
GCWRE
Generic command FIFO.
An overflow occurs in the DPI
LPWRE
pixel payload FIFO.
Host receives a transmission
EOTPE that does not end with an End
of Transmission packet.
RM0432 Rev 6
Recommended method
of handling the error
The Read FIFO size is not correctly
dimensioned for the maximum read-back
packet size.
Configure the Device to return the read
data with a suitable size for the Host
dimensioned FIFO. Data stored in the FIFO
is corrupted.
Reset the DSI Host and repeat the read
procedure.
System does not wait for the read
procedure to end and starts retrieving the
data from the FIFO. The read data is
requested before it is fully received. Data is
corrupted.
Reset the DSI Host and repeat the read
procedure. Check that the read procedure
is completed before reading the data
through the APB interface.
The system writes the packet header
before the respective packet payload is
completely loaded into the payload FIFO.
This error is unrecoverable, the transmitted
packet is corrupted.
Reset the DSI Host and repeat the write
procedure.
The payload FIFO size is not correctly
dimensioned to store the total payload of a
long packet. Data stored in the FIFO is
corrupted.
Reset the DSI Host and repeat the write
procedure.
The command FIFO size is not correctly
dimensioned to store the total headers of a
burst of packets. Data stored in the FIFO is
corrupted.
Reset the DSI Host and repeat the write
procedure.
The controller FIFO dimensions are not
correctly set up for the operating resolution.
Check the Video mode configuration
registers. They should be consistent with
the LTDC video resolution. The pixel data
sequence is corrupted.
Reset the DSI Host and re-initiate the
Video transmission.
This error is not critical for the data integrity
of the received packets.
Check if the Device supports the
transmission of EoTp packets.
RM0432