ST STM32L4+ Series Reference Manual page 377

RM0432
The DMA block diagram is shown in the figure below.
dma1_req [1..7]
dma1_ack [1..7]
dma2_req [1..7],
dma2_ack [1..7]
The DMA controller performs direct memory transfer by sharing the AHB system bus with
other system masters. The bus matrix implements round-robin scheduling. DMA requests
may stop the CPU access to the system bus for a number of bus cycles, when CPU and
DMA target the same destination (memory or peripheral).
Figure 31. DMA block diagram
DMA1
Ch 1
Ch 2
Ch 7
Arbiter
Interrupt
interface
dma1_it[1..7]
DMA2
Ch 1
Ch 2
Ch 7
Arbiter
Interrupt
interface
dma2_it[1..7]
RM0432 Rev 6
Direct memory access controller (DMA)
AHB master interface
AHB slave interface
AHB master interface
AHB slave interface
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