ST STM32L4+ Series Reference Manual page 813

RM0432
Bits 3:2 PWRMODE[1:0]: Power Mode of the comparator 1
Bit 1 Reserved, must be kept cleared.
Bit 0 EN: Comparator 1 enable bit
26.6.2 Comparator 2 control and status register (COMP2_CSR)
The COMP2_CSR is the Comparator 2 control/status register. It contains all the bits /flags
related to comparator 2.
Address offset: 0x04
System reset value: 0x0000 0000
31 30 29
LOCK VALUE Res. Res.
rs r
15 14 13
POLA
Res. Res. Res.
RITY
rw
Bit 31 LOCK: CSR register lock bit
Bit 30 VALUE: Comparator 2 output status bit
Bits 29: Reserved, must be kept at reset value
Bit 23 SCALEN: Voltage scaler enable bit
These bits are set and cleared by software (only if LOCK not set). They control the
power/speed of the Comparator 1.
00: High speed
01 or 10: Medium speed
11: Ultra low power
This bit is set and cleared by software (only if LOCK not set). It switches on Comparator1.
0: Comparator 1 switched OFF
1: Comparator 1 switched ON
28 27 26 25
Res. Res. Res.
12 11 10 9
WIN
Res. Res.
MODE
rw
This bit is set by software and cleared by a hardware system reset. It locks the whole
content of the comparator 2 control register, COMP2_CSR[31:0].
0: COMP2_CSR[31:0] for comparator 2 are read/write
1: COMP2_CSR[31:0] for comparator 2 are read-only
This bit is read-only. It reflects the current comparator 2 output taking into account
POLARITY bit effect.
This bit is set and cleared by software. This bit enable the outputs of the V
available on the minus input of the Comparator 2.
0: Bandgap scaler disable (if SCALEN bit of COMP1_CSR register is also reset)
1: Bandgap scaler enable
24 23 22
SCAL BRG
Res.
EN EN
rw rw
8 7 6
INP
Res. INMSEL
SEL.
rw
RM0432 Rev 6
Comparator (COMP)
21 20 19 18
Res. BLANKING
rw
5 4 3 2
PWRMODE
rw rw
REFINT
17 16
HYST
rw
1 0
Res. EN
rw
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