ST STM32L4+ Series Reference Manual page 579

RM0432
Memory-mapped mode configuration
In Memory-mapped mode, the external device is seen as an internal memory but with some
latency during the accesses. Read and write operations are allowed to the external device in
this mode.
The Memory-mapped mode is entered by setting FMODE[1:0] = 11. The programmed
instruction and frame is sent when an AHB master is accessing the memory mapped space.
The FIFO is used as a prefetch buffer to anticipate any linear reads. Any access to
OCTOSPI_DR in this mode returns zero.
The data length register (OCTOSPI_DLR) has no meaning in Memory-mapped mode.
All the configuration operation must be completed prior to the first access to the memory
area. On the first access, the OCTOSPI becomes busy, and no configuration is allowed.
19.4.16 OCTOSPI error management
A error can be generated in the following cases:
•
In Indirect mode or Status-flag polling mode, when a wrong address has been
programmed in OCTOSPI_AR (according to the device size defined by DEVSIZE[4:0]).
This sets TEF and an interrupt is generated if enabled.
•
In Indirect mode, if the address plus the data length exceed the device size. TEF is set
as soon as the access is triggered.
•
In Memory-mapped mode when an out-of-range access is done by an AHB master, it
generates an AHB error as a response to the faulty AHB request.
•
An access to the memory-mapped area when the Memory-mapped mode is disabled,
generates an AHB error as a response to the faulty AHB request.
The OCTOSPI1 generates an AHB slave error in the following situations:
•
Memory mapped mode is disabled and an AHB read request occurs.
• Read or write address exceeds the size of the external memory.
•
Abort is received while a read or write burst is ongoing.
• OCTOSIPI is disabled while a read or write burst is ongoing.
•
Write request received while the DQSE bit in the WCCR register is 0, which means that
the DQS output is disabled.
•
Write request received while DMODE[2:0] = 000 (no data phase), except when
MTYP[2:0] is HyperBus.
19.4.17 OCTOSPI busy bit and abort functionality
Once the OCTOSPI starts an operation with the external device, BUSY is automatically set
in OCTOSPI_SR.
In Indirect mode, BUSY is reset once the OCTOSPI has completed the requested command
sequence and the FIFO is empty.
In Automatic-polling mode, BUSY goes low only after the last periodic access is complete,
due to a match when APMS = 1 or due to an abort.
After the first access in Memory-mapped mode, BUSY goes low only on an abort.
Any operation can be aborted by setting the ABORT bit in OCTOSPI_CR. Once the abort is
completed, BUSY and ABORT are automatically reset, and the FIFO is flushed.
RM0432 Rev 6
Octo-SPI interface (OCTOSPI)
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