ST STM32L4+ Series Reference Manual page 894

LCD-TFT display controller (LTDC)
horizontal and vertical synchronization timings panel signals, the pixel clock and the data
enable signals.
VSYNC width
Note: The HBP and HFP are respectively the horizontal back porch and front porch period.
The VBP and the VFP are respectively the vertical back porch and front porch period.
The LCD-TFT programmable synchronous timings are the following:
• HSYNC and VSYNC width: horizontal and vertical synchronization width, configured by
programming a value of HSYNC width - 1 and VSYNC width - 1 in the LTDC_SSCR
register
•
HBP and VBP: horizontal and vertical synchronization back porch width, configured by
programming the accumulated value HSYNC width + HBP - 1 and the accumulated
value VSYNC width + VBP - 1 in the LTDC_BPCR register.
•
Active width and active height: the active width and active height are configured by
programming the accumulated value HSYNC width + HBP + active width - 1 and the
accumulated value VSYNC width + VBP + active height - 1 in the LTDC_AWCR
register.
•
Total width: the total width is configured by programming the accumulated value
HSYNC width + HBP + active width + HFP - 1 in the LTDC_TWCR register. The HFP is
the horizontal front porch period.
•
Total height: the total height is configured by programming the accumulated value
VSYNC height + VBP + active height + VFP - 1 in the LTDC_TWCR register. The VFP
is the vertical front porch period.
894/2301
Figure 200. LCD-TFT synchronous timings
VBP
Active height
VFP
Total width
HBP
Data1, Line1
Active display area
RM0432 Rev 6
Active width
Data(n), Line(n)
RM0432
HFP
MSv19674V1