ST STM32L4+ Series Reference Manual page 791

RM0432 Parallel synchronous slave interface (PSSI) applied to STM32L4P5xx and STM32LQ5xx
25.3.1 PSSI block diagram
25.3.2 PSSI pins and internal signals
The PSSI interface is composed of 19 pins, though nine signals are enough to transfer
parallel data.
When the PSSI ENABLE bit (bit 14 of PSSI_CR) is set to 1, the alternate functions and the
interrupt vector are associated with the PSSI. Otherwise, they are associated with the
DCMI. The DCMI ENABLE bit (bit 15 of DCMI_CR) and the PSSI ENABLE bit (bit 14 of
PSSI_CR) must not be set to 1 at the same time. As an example, if a GPIO is configured to
use the alternate function PSSI_PDCK/DCMI_PIXCK, it is the PSSI_PDCK function which
becomes active if PSSI_CR/ENABLE is set to 1.
Figure 176. PSSI block diagram
DMA
interface
FIFO/
Data
formatter
Figure 177. Top-level block diagram
pssi_hclk
pssi_it
Interrupt
controller
pssi_dma
Table 165 shows the PSSI pins.
RM0432 Rev 6
Control/Status
Register
Data
Synchronizer
extraction
PSSI_D[15:0]
PSSI_DE
PSSI
PSSI_RDY
PSSI_PDCK
PSSI_PDCK
PSSI_D[15:0]
PSSI_DE
PSSI_RDY
MSv48844V2
External interface
MSv48845V3
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