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RM0432
Bits 31: 13 Reserved, must be kept at reset value
Bits 12: 0 NUMC: Number of Chunks
30.15.14 DSI Host Video Null Packet Configuration Register (DSI_VNPCR)
Address offset: 0x0044
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Bits 31: 13 Reserved, must be kept at reset value
Bits 12: 0 NPSIZE: Null Packet Size
30.15.15 DSI Host Video HSA Configuration Register (DSI_VHSACR)
Address offset: 0x0048
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31: 12 Reserved, must be kept at reset value
Bits 11: 0 HSA: Horizontal Synchronism Active duration
DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
This register configures the number of chunks to be transmitted during a Line period (a
chunk consists of a video packet and a null packet).
If set to 0 or 1, the video line is transmitted in a single packet.
If set to 1, the packet is part of a chunk, so a null packet follows it if NPSIZE > 0.
Otherwise, multiple chunks are used to transmit each video line.
28
27
26
25
Res.
Res.
Res.
12
11
10
9
This field configures the number of bytes inside a null packet.
Setting to 0 disables the null packets.
28
27
26
25
Res.
Res.
Res.
12
11
10
9
This fields configures the Horizontal Synchronism Active period in lane byte clock cycles..
24
23
22
Res.
Res.
Res.
8
7
6
NPSIZE[12:0]
rw
24
23
22
Res.
Res.
Res.
8
7
6
HSA[11:0]
rw
RM0432 Rev 6
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
17
16
Res.
Res.
1
0
17
16
Res.
Res.
1
0
993/2301
1044
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