ST STM32L4+ Series Reference Manual page 518

Flexible static memory controller (FSMC) RM0432
Mode D - asynchronous access with extended address
Figure 57. Mode D read access waveforms
Memory transaction
A[25:0]
NADV
NBL[x:0]
NEx
NOE
High
NWE
Data bus Data driven by memory
NBLSET ADDSET HCLK cycles ADDHLD DATAST HCLK cycles DATAHLD
HCLK HCLK HCLK cycles
cycles cycles
MSv41683V1
518/2301 RM0432 Rev 6