ST STM32L4+ Series Reference Manual page 951

RM0432
t
H1
This time is calculated as follows:
LPSIZE = (t
t
• = line time;
L
t
•
= time of the HSA pulse for sync pulses mode
H1
packet, including EoTp
t
•
HS->LP
t
•
LP->HS
• t
LPDT
Exit. According to the D-PHY specification, this value is always 11 bits in LP (or 22 TX
escape clock cycles);
t
•
ESCCLK
register;
t
•
ESCCLK
In the above equation, division by eight is done to convert the available time to bytes.
Division by two is done because one bit is transmitted every two escape clock cycles. The
Largest Packet Size (LPSIZE) field can be compared directly with the size of the command
to be transmitted to determine if there is enough time to transmit the command. The
maximum size of a command that can be transmitted in Low-Power mode is limited to 255
bytes by this field. You must program this register to a value greater than or equal to 4 bytes
for the transmission of the DCTRL commands, such as shutdown and color in Low-Power
mode.
Consider an example of a frame with 12.4 μs per line and assume an escape clock
frequency of 20 MHz and a lane bit rate of 800 Mbits. In this case, it is possible to send 124
bits in escape mode (that is, 124 bit = 12.4 μs * 20 MHz / 2). Still, you need to take into
consideration the D-PHY protocol and PHY timings.
The following assumptions are made:
•
lane byte clock period is 10 ns (800 Mbits per Lane);
• escape clock period is 50 ns (DSI_CCR.TXECKDIV = 5);
•
video is transmitted in Non-Burst mode with sync pulses bounded by HSS and HSE
packets;
•
DSI is configured for two lanes;
•
D-PHY takes 180 ns to transit from Low-Power to High-Speed mode
(DSI_DLTCR.LS2HS_TIME = 18);
•
D-PHY takes 200 ns to transit from High-Speed to Low-Power mode
(DSI_DLTCR.HS2LP_TIME = 20);
t
•
HSA
DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
Figure 222. LPSIZE for Burst or Non-Burst with sync events
t t
HS -> LP LPDT
HSÆLP
- (t + t + t
L H1 HS->LP
(Figure
= time to enter the Low-Power mode;
= time to leave the Low-Power mode;
= D-PHY timing related with Escape mode Entry, LPDT Command, and Escape
= escape clock period as programmed in the TXECKDIV field of the DSI_CCR
= delay imposed by the DSI Host implementation.
= 420 ns.
t
L
outvact_lpcmd_time
+ t + 2 t
LPHS LPDT ESCCLK
222);
RM0432 Rev 6
t
LPDT
)) / (2 × 8 × t ),
ESCCLK
(Figure 221) or time to send the HSS
t
LPS -> HS
LPÆHS
MSv35871V1
where
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