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DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
30.15.10 DSI Host mode Configuration Register (DSI_MCR)
Address offset: 0x0034
Reset value: 0x0000 0001
31
30
29
28
Res.
Res.
Res.
Res.
15
14
13
12
Res.
Res.
Res.
Res.
Bits 31: 1 Reserved, must be kept at reset value
Bit 0 CMDM: Command mode
30.15.11 DSI Host video mode Configuration Register (DSI_VMCR)
Address offset: 0x0038
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
15
14
13
LPCE FBTAAE
LPHFE LPHBPE LPVAE LPVFPE LPVBPE LPVSAE
rw
rw
rw
Bits 31: 25 Reserved, must be kept at reset value
Bit 24 PGO: Pattern Generator Orientation
Bits 23: 21 Reserved, must be kept at reset value
Bit 20 PGM: Pattern Generator mode
Bits 19: 17 Reserved, must be kept at reset value
990/2301
27
26
25
Res.
Res.
Res.
11
10
9
Res.
Res.
Res.
This bit configures the DSI Host in either Video or Command mode.
0: DSI Host is configured in video mode.
1: DSI Host is configured in Command mode.
28
27
26
Res.
Res.
Res.
Res.
12
11
10
rw
rw
rw
This bit configures the color bar orientation.
0: Vertical color bars.
1: Horizontal color bars.
This bit configures the pattern generator mode.
0: Color bars (horizontal or vertical).
1: BER pattern (vertical only).
24
23
22
Res.
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
Res.
25
24
23
22
PGO
Res.
Res.
rw
9
8
7
6
Res.
Res.
rw
rw
RM0432 Rev 6
21
20
19
18
Res.
Res.
Res.
5
4
3
2
Res.
Res.
Res.
21
20
19
Res.
PGM
Res.
rw
5
4
3
Res.
Res.
Res.
RM0432
17
16
Res.
Res.
1
0
Res.
CMDM
rw
18
17
16
Res.
Res.
PGE
rw
2
1
0
Res.
VMT[1:0]
rw
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