ST STM32L4+ Series Reference Manual page 689

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End of sequence of conversions of an injected group

Analog watchdog 1 status bit is set

Analog watchdog 2 status bit is set

Analog watchdog 3 status bit is set

End of sampling phase

Injected context queue overflows

Table 139. ADC interrupts per each ADC (continued)

Interrupt event

RM0432 Rev 6

Analog-to-digital converters (ADC)

Enable control bit

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