ST STM32L4+ Series Reference Manual page 558

Octo-SPI interface (OCTOSPI)
AHB/
AXI
19.4.2 OCTOSPI interface to memory modes
The OCTOSPI can operate in two different operating modes:
•
Regular-command mode
•
HyperBus mode
In any of these two modes, the OCTOSPI uses from 6 to 12 signals to interface with a
memory, depending on the functional mode:
•
nCS: chip-select used in all modes
•
CLK: communication clock used in all modes
•
DQS: data strobe used mainly in Octal mode
•
IO[3:0]: data bus LSB used in all modes
•
IO[7:4]: data bus MSB used in Dual-quad and Octal modes
19.4.3 OCTOSPI Regular-command mode
When in Regular-command mode, the OCTOSPI communicates with the external device
using commands. Each command can include five phases:
•
Instruction phase
•
Address phase
•
Alternate-byte phase
•
Dummy phase
• Data phase
Any of these phases can be configured to be skipped, but at least one of the instruction,
address, alternate byte, or data phases must be present.
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Figure 70. OCTOSPI block diagram when dual-Flash is enabled
Clock
Registers/
management
control
FIFO
Shift
register
RM0432 Rev 6
Quad-SPI memory 1
OCTOSPI_CLK
OCTOSPI_IO0
OCTOSPI_IO1
OCTOSPI_IO2
OCTOSPI_IO3
OCTOSPI_nCS
OCTOSPI_IO4
OCTOSPI_IO5
OCTOSPI_IO6
OCTOSPI_IO7
RM0432
CLK
Q0/SI
Q1/SO
Q2/WP
Q3/HOLD
CS
Quad-SPI memory 2
CLK
Q0/SI
Q1/SO
Q2/WP
Q3/HOLD
CS
MSv43487V2