ST STM32L4+ Series Reference Manual page 787

RM0432
Bits 31:29 Reserved, must be kept at reset value.
Bits 28:16 VST[12:0]: Vertical start line count
Bits 15:14 Reserved, must be kept at reset value.
Bits 13:0 HOFFCNT[13:0]: Horizontal offset count
24.5.10 DCMI crop window size (DCMI_CWSIZE)
Address offset: 0x24
Reset value: 0x0000 0000
31 30 29
Res. Res.
rw
15 14 13
Res. Res.
rw
Bits 31:30 Reserved, must be kept at reset value.
Bits 29:16 VLINE[13:0]: Vertical line count
Bits 15:14 Reserved, must be kept at reset value.
Bits 13:0 CAPCNT[13:0]: Capture count
24.5.11 DCMI data register (DCMI_DR)
Address offset: 0x28
Reset value: 0x0000 0000
The digital camera Interface packages all the received data in 32-bit format before
requesting a DMA transfer. A 8-word deep FIFO is available to leave enough time for DMA
transfers and avoid DMA overrun conditions.
The image capture starts with this line number. Previous line data are ignored.
0x0000: line 1
0x0001: line 2
0x0002: line 3
....
This value gives the number of pixel clocks to count before starting a capture.
28 27 26 25
rw rw rw rw
12 11 10 9
rw rw rw rw
This value gives the number of lines to be captured from the starting point.
0x0000: 1 line
0x0001: 2 lines
0x0002: 3 lines
....
This value gives the number of pixel clocks to be captured from the starting point on the
same line. It value must corresponds to word-aligned data for different widths of parallel
interfaces.
0x0000 => 1 pixel
0x0001 => 2 pixels
0x0002 => 3 pixels
....
24 23 22
VLINE[13:0]
rw rw rw
8 7 6
CAPCNT[13:0]
rw rw rw
RM0432 Rev 6
Digital camera interface (DCMI)
21 20 19 18
rw rw rw rw
5 4 3 2
rw rw rw rw
17 16
rw rw
1 0
rw rw
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