ST STM32L4+ Series Reference Manual page 137

RM0432
Bits 30:17 Reserved, must be kept at reset value.
WRP Area A address option bytes
Flash memory address: 0x1FF0 0018
ST production value: 0x0000 00FF
31 30 29
Res. Res. Res.
15 14 13
Res. Res. Res.
Bits 31:24 Reserved, must be kept at reset value.
Bits 23:16 WRP1A_END[7:0]: WRP first area "A" end offset
WRP1 Area B address option bytes
Flash memory address: 0x1FF0 0020
ST production value: 0x0000 00FF
Bit 31 PCROP_RDP: PCROP area preserved when RDP level decreased
This bit is set only. It is reset after a full mass erase due to a change of RDP
from Level 1 to Level 0.
0: PCROP area is not erased when the RDP level is decreased from Level 1 to
Level 0.
1: PCROP area is erased when the RDP level is decreased from Level 1 to
Level 0 (full mass erase).
Bits 16:0 PCROP1_END: Bank 1 PCROP area end offset
DBANK=1
PCROP1_END contains the last double-word of the bank 1 PCROP area.
DBANK=0
PCROP1_END contains the last 2x double-word PCROP area for all memory.
28 27 26 25
Res. Res. Res. Res.
12 11 10 9
Res. Res. Res. Res.
DBANK=1
WRP1A_END contains the last page of WRP first area in bank1.
DBANK=0
WRP1A_END contains the last page of WRP first area for all memory.
Bits 15:8 Reserved, must be kept at reset value.
Bits 7:0 WRP1A_STRT[7:0]: WRP first area "A" start offset
DBANK=1
WRP1A_STRT contains the first page of WRP first area for bank1.
DBANK=0
WRP1A_STRT contains the first page of WRP first area for all memory.
24 23 22
Res.
rw rw
8 7 6
Res.
rw rw
RM0432 Rev 6
Embedded Flash memory (FLASH)
21 20 19 18
WRP1A_END[7:0]
rw rw rw rw
5 4 3 2
WRP1A_STRT[7:0]
rw rw rw rw
17 16
rw rw
1 0
rw rw
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