Chrom-ART Accelerator controller (DMA2D)
The two pixel format converters have to be configured as described in the memory-to-
memory mode. Their configurations can be different as each pixel format converter are
independent and have their own CLUT memory.
Once each pixel has been converted into 32 bits by their respective PFCs, they are blended
according to the equation below:
The resulting 32-bit pixel value is encoded by the output PFC according to the specified
output format, and the data are written into the destination memory location pointed by
DMA2D_OMAR.
Memory-to-memory with PFC, blending and fixed color FG
In this mode, only 1 source is fetched in the background FIFO from the memory location
defined by DMA2D_BGMAR.
The value of the foreground color is given by the DMA2D_FGCOLR register and the alpha
value is set to 0xFF (opaque).
The alpha value can be replaced or modified according to the AM[1:0] and ALPHA[7:0]
fields of the DMA2D_FGPFCR.
The two pixel format converters have to be configured as described in the memory-to-
memory mode. Their configurations can be different as each pixel format converter are
independent and have their own CLUT memory
Once each pixel has been converted into 32 bits by their respective PFCs, they are blended
together, and the resulting 32-bit pixel value is encoded by the output PFC according to the
specified output format, and the data are written into the destination memory location
pointed by DMA2D_OMAR.
Memory-to-memory with PFC, blending and fixed color BG
In this mode, only 1 source is fetched in the foreground FIFO from the memory location
defined by DMA2D_FGMAR.
The value of the background color is given by the DMA2D_BGCOLR register and the alpha
value is set to 0xFF (opaque).
The alpha value can be replaced or modified according to the AM[1:0] and ALPHA[7:0]
fields of the DMA2D_BGPFCR.
The two pixel format converters have to be configured as described in the memory-to-
memory mode. Their configurations can be different as each pixel format converter are
independent and have their own CLUT memory
428/2301
with α
=
Mult
α
= α
OUT
FG
C
.α
+ C
FG
FG
C
=
OUT
α
RM0432 Rev 6
α
. α
FG
BG
255
+ α
- α
BG
Mult
.α
- C
.α
BG
BG
BG
Mult
OUT
Division are rounded to the nearest lower integer
with C = R or G or B
RM0432
Need help?
Do you have a question about the STM32L4+ Series and is the answer not in the manual?