ST STM32L4+ Series Reference Manual page 164

Embedded Flash memory (FLASH)
3.7.13 Flash PCROP2 Start address register (FLASH_PCROP2SR)
Address offset: 0x44
Reset value: 0xFFFF FFFF
Access: no wait state when no Flash memory operation is on going; word access.
31 30 29
Res. Res. Res.
15 14 13
rw rw rw
Bits 31:17 Reserved, must be kept cleared
3.7.14 Flash PCROP2 End address register (FLASH_PCROP2ER)
Address offset: 0x48
Reset value: 0xXFFX XXXX
Access: no wait state when no Flash memory operation is on going; word access
31 30 29
Res. Res. Res.
15 14 13
rw rw rw
Bits 31:17 Reserved, must be kept cleared
Bits 23:16 PCROP2_END: PCROP area end offset
164/2301
28 27 26 25
Res. Res. Res. Res.
12 11 10 9
rw rw rw rw
Bits 16:0 PCROP2_STRT: PCROP area start offset
DBANK=1
PCROP2_STRT contains the first double-word of the PCROP area for bank 2.
DBANK=0
PCROP2_STRT contains the first double-word PCROP area for all memory.
28 27 26 25
Res. Res. Res. Res.
12 11 10 9
rw rw rw rw
DBANK=1
PCROP2_END contains the last double-word of the PCROP area for bank2.
DBANK=0
PCROP2_END contains the last 2xdouble-word of the PCROP area for all the
memory.
24 23 22
Res. Res. Res.
8 7 6
PCROP2_STRT[16:0]
rw rw rw
24 23 22
Res. Res. Res.
8 7 6
PCROP2_END[16:0]
rw rw rw
RM0432 Rev 6
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
rw rw rw rw
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
rw rw rw rw
RM0432
17 16
PCRO
Res. P2_ST
RT
rw
1 0
rw rw
17 16
PCRO
Res. P2_EN
D
rw
1 0
rw rw