ST STM32L4+ Series Reference Manual page 168

Embedded Flash memory (FLASH)
Table 20. Flash interface - register map and reset values (continued)
Offset Register
FLASH_
WRP2AR
0x30
Reset value
FLASH_
PCROP2SR
0x44
Reset value
FLASH_
PCROP2ER
0x48
Reset value
FLASH_
WRP1BR
0x4C
Reset value
FLASH_
WRP2BR
0x50
Reset value
FLASH_CFGR
0x130
Reset value
Refer to
168/2301
X X X X X X X X
X X X X X X X X
X X X X X X X X
Section 2.2 on page 91
WRP2A_END[7:0]
1 X X X X X X X X X X X X X X X X
0 X X X X X X X X X X X X X X X X
WRP1B_END[7:0]
WRP2B_END[7:0]
for the register boundary addresses.
RM0432 Rev 6
WRP2A_STRT[7:0]
X X X X X X X X
PCROP2_STRT[16:0]
PCROP2_END[16:0]
WRP1B_STRT[7:0]
X X X X X X X X
WRP2B_STRT[7:0]
X X X X X X X X
RM0432
0