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ST STM32L4+ Series Reference Manual page 947

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RM0432
mode for High-Speed write operation timeout. When set to 1, this bit allows the PRESP_TO
from HSWR_TOCNT to be used only once, when both of the following conditions are met:
the LTDC VSYNC signal rises and falls;
the packets originated from the LTDC interface in Adapted Command mode are
transmitted and its FIFO is empty again.
In this scenario, non-Adapted Command mode requests are not sent to the D-PHY, even if
there is traffic from the Generic interface ready to be sent, returning them to the Stop state.
When it happens, the PRESP_TO counter is activated and only when it is completed, the
DSI Host sends any other traffic that is ready, as illustrated in
dpivsync_edpiwms
dpidataen
dpidata[29:0]
edpi_fifo_empty
gen_wr_en
gen_data[31:0]
link_state[1:0]
LP
link_data[31:0]
PRESP_TO_active
DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
Figure 218. Effect of Prep mode at 1
A10
A20
B3
HS
RM0432 Rev 6
Figure
A30
LP
218.
HS
LP
MSv35880V1
947/2301
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