ST STM32L4+ Series Reference Manual page 1036

DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
30.16.8 DSI Wrapper PHY Configuration Register 2 (DSI_WPCR2)
Address offset: 0x0420
Reset value: 0x0000 0000
Note: This register shall be programmed only when DSI is stopped (CR. DSIEN=0 and
CR.EN = 0).
31 30 29
THSTRAIL[7:0]
15 14 13
TCLKZERO[7:0]
Bits 31:24 THSTRAIL: t
Bits 23:16 THSPREP: t
Bits 15:8 TCLKZERO: t
Bits 7:0 TCLKPREP: t
1036/2301
28 27 26 25
rw
12 11 10 9
rw
HSTRAIL
This field defines the t
is used by the D-PHY when the THSTRAILEN bit of the DSI_WPCR0 is set.
THSTRAIL = 2 x t
HS-TRAIL
THSTRAILEN bit of the DSI_WPCR0 is reset is 140, i.e. 70 ns + 8*UI.
HS-PREPARE
This field defines the t
value is used by the D-PHY when the THSPREPEN bit of the DSI_WPCR0 is set.
THSPREP = 2 x t
HS-PREPARE
THSPREPEN bit of the DSI_WPCR0 is reset is 126, i.e. 63 ns + 12*UI.
CLK-ZERO
This field defines the t
CLK-ZERO
is used by the D-PHY when the TCLKZEROEN bit of the DSI_WPCR0 is set.
TCLKZERO = t
CLK-ZERO
TCLKZEROEN bit of the DSI_WPCR0 is reset is 195, i.e. 390 ns.
CLK-PREPARE
This field defines the t
value is used by the D-PHY when the TCLKPREPEN bit of the DSI_WPCR0 is set.
TCLKPREP = 2 x t
CLK-PREPARE
when TCLKPREPEN bit of the DSI_WPCR0 is reset is 120, i.e. 60 ns + 20*UI.
24 23 22
8 7 6
has specified in the MIPI
HS-TRAIL
expressed in ns.The default value used by the D-PHY when
has specified in the MIPI
HS-PREPARE
expressed in ns.The default value used by the D-PHY when
has specified in the MIPI
/ 2 expressed in ns.The default value used by the D-PHY when
has specified in the MIPI
CLK-PREPARE
expressed in ns.The default value used by the D-PHY
RM0432 Rev 6
21 20 19 18
THSPREP[7:0]
rw
5 4 3 2
TCLKPREP[7:0]
rw
®
D-PHY specification. This value
®
D-PHY specification. This
®
D-PHY specification. This value
®
D-PHY specification. This
RM0432
17 16
1 0