ST STM32L4+ Series Reference Manual page 521

RM0432 Flexible static memory controller (FSMC)
Muxed mode - multiplexed asynchronous access to NOR Flash memory
Figure 59. Muxed read access waveforms
Memory transaction
A[25:16]
NADV
NBL[x:0]
NEx
NOE
High
NWE
AD[15:0] Lower address Data driven by memory
NBLSET ADDSET HCLK cycles ADDHLD DATAST HCLK cycles DATAHLD
HCLK HCLK HCLK cycles
cycles cycles
MSv41685V1
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