Download Print this page

ST STM32L4+ Series Reference Manual page 895

Hide thumbs Also See for STM32L4+ Series:

Advertisement

RM0432
Note:
When the LTDC is enabled, the timings generated start with X/Y=0/0 position as the first
horizontal synchronization pixel in the vertical synchronization area and following the back
porch, active data display area and the front porch.
When the LTDC is disabled, the timing generator block is reset to X = total width - 1,
Y = total height - 1 and held the last pixel before the vertical synchronization phase and the
FIFO are flushed. Therefore only blanking data is output continuously.
Example of synchronous timings configuration
LCD-TFT timings (must be extracted from panel datasheet):
horizontal and vertical synchronization width: 0xA pixels and 0x2 lines
horizontal and vertical back porch: 0x14 pixels and 0x2 lines
active width and active height: 0x140 pixels, 0xF0 lines (320x240)
horizontal front porch: 0xA pixels
vertical front porch: 0x4 lines
The programmed values in the LTDC timings registers are:
LTDC_BPCR register: to be programmed to 0x001D0003 (AHBP[11:0] is 0x1D(0xA+
0x13) and AVBP[10:0]A is 0x3(0x2 + 0x1)).
LTDC_AWCR register: to be programmed to 0x015D00F3 (AAW[11:0] is 0x15D(0xA
+0x14 +0x13F) and AAH[10:0] is 0xF3(0x2 +0x2 + 0xEF).
LTDC_TWCR register: to be programmed to 0x00000167 (TOTALW[11:0] is 0x167(0xA
+0x14 +0x140 + 0x9).
LTDC_THCR register: to be programmed to 0x000000F7 (TOTALH[10:0]is 0xF7(0x2
+0x2 + 0xF0 + 3)
Programmable polarity
The horizontal and vertical synchronization, data enable and pixel clock output signals
polarity can be programmed to active high or active low through the LTDC_GCR register.
Background color
A constant background color (RGB888) can programmed through the LTDC_BCCR register.
It is used for blending with the bottom layer.
Dithering
The dithering pseudo-random technique using an LFSR is used to add a small random
value (threshold) to each pixel color channel (R, G or B) value, thus rounding up the MSB in
some cases when displaying a 24-bit data on 18-bit display. Thus the dithering technique is
used to round data which is different from one frame to the other.
The dithering pseudo-random technique is the same as comparing LSBs against a
threshold value and adding a 1 to the MSB part only, if the LSB part is ≥ the threshold. The
LSBs are typically dropped once dithering was applied.
The width of the added pseudo-random value is two bits for each color channel: two bits for
red, two bits for green and two bits for blue.
Once the LCD-TFT controller is enabled, the LFSR starts running with the first active pixel
and it is kept running even during blanking periods and when dithering is switched off. If the
LTDC is disabled, the LFSR is reset.
RM0432 Rev 6
LCD-TFT display controller (LTDC)
895/2301
923

Advertisement

loading
Need help?

Need help?

Do you have a question about the STM32L4+ Series and is the answer not in the manual?

Subscribe to Our Youtube Channel