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RM0432
30.15.24 DSI Host Generic Header Configuration Register (DSI_GHCR)
Address offset: 0x006C
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Bits 31: 24 Reserved, must be kept at reset value
Bits 23: 16 WCMSB: WordCount MSB
Bits 15: 8 WCLSB: WordCount LSB
Bits 7: 6 VCID: Channel
Bits 5: 0 DT: Type
30.15.25 DSI Host Generic Payload Data Register (DSI_GPDR)
Address offset: 0x0070
Reset value: 0x0000 0000
31
30
29
15
14
13
Bits 31: 24 DATA4: Payload Byte 4
Bits 23: 16 DATA3: Payload Byte 3
Bits 15: 8 DATA2: Payload Byte 2
Bits 7: 0 DATA1: Payload Byte 1
DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
28
27
26
25
Res.
Res.
Res.
12
11
10
9
WCLSB[7:0]
rw
This field configures the most significant byte of the header packet's word count for long
packets or data 1 for short packet.
This field configures the most significant byte of the header packet's word count for long
packets or data 1 for short packet.
This field configures the virtual channel ID of the header packet.
This field configures the packet data type of the header packet.
28
27
26
25
DATA4[7:0]
rw
12
11
10
9
DATA2[7:0]
rw
This field indicates the byte 4 of the packet payload.
This field indicates the byte 3 of the packet payload.
This field indicates the byte 2 of the packet payload.
This field indicates the byte 1 of the packet payload.
24
23
22
Res.
8
7
6
VCID[1:0]
rw
24
23
22
8
7
6
RM0432 Rev 6
21
20
19
18
WCMSB[7:0]
rw
5
4
3
2
DT[5:0]
rw
21
20
19
18
DATA3[7:0]
rw
5
4
3
2
DATA1[7:0]
rw
17
16
1
0
17
16
1
0
999/2301
1044
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