ST STM32L4+ Series Reference Manual page 478

Extended interrupts and events controller (EXTI)
selected edge occurs on the event line, an event pulse is generated. The pending bit
corresponding to the event line is not set.
For the configurable lines, an interrupt/event request can also be generated by software by
writing a '1' in the software interrupt/event register.
Note: The interrupts or events associated to the direct lines are triggered only when the system is
in Stop mode. If the system is still running, no interrupt/event is generated by the EXTI.
16.3.1 EXTI block diagram
The extended interrupt/event block diagram is shown on
PCLK
Falling
trigger
selection
register
Configurable
Edge detect
events
Direct events
16.3.2 Wakeup event management
The STM32L4+ Series devices are able to handle external or internal events in order to
wake up the core (WFE). The wakeup event can be generated either by:
•
enabling an interrupt in the peripheral control register but not in the NVIC, and enabling
the SEVONPEND bit in the Cortex
resumes from WFE, the EXTI peripheral interrupt pending bit and the peripheral NVIC
IRQ channel pending bit (in the NVIC interrupt clear pending register) have to be
cleared
• or by configuring an EXTI line in event mode. When the CPU resumes from WFE, it is
not necessary to clear the peripheral interrupt pending bit or the NVIC IRQ channel
pending bit as the pending bit corresponding to the event line is not set.
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Figure 43. Configurable interrupt/event block diagram
Rising
Software
trigger
interrupt
selection
event
register
register
circuit
Stop mode
APB bus
Peripheral interface
Interrupt
Event
mask
mask
register register
-M4 System Control register. When the MCU
TM
RM0432 Rev 6
Figure 43.
Pending
request
register
Interrupts
Events
Wakeup
RM0432
MS33393V1