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ST STM32L4+ Series Reference Manual page 607

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RM0432
20.4.3
OCTOSPIM multiplexer
When the Multiplexed mode is set, the two OCTOSPIs are multiplexed over the same bus.
Both OCTOSPIs get the ownership of the bus in turn through a request/acknowledge
protocol with REQ/ACK signals.
The multiplexing is enabled by setting the MUXEN bit of the OCTOSPI I/O manager
configuration register (OCTOSPIM_CR).
The fairness counter (MAXTRAN) of each OCTOSPI can be used to accurately manage the
maximum duration for which a given OCTOSPI is taking the bus: this feature ensures a
maximum bus access latency for the other OCTOSPIs. When the bus is released by one
OCTOSPI, an arbitration phase occurs, which is round-robin: if the other OCTOSPI requests
the bus, it gets it.
OCTOSPIn_nCS are not part of the multiplexing. Only the OCTOSPIn_IO[7:0], the
OCTOSPIn_DQS and OCTOSPIn_CLK / OCTOSPIn_NCLK are muxed.
When the Multiplexed mode is used, only clock mode 0 is supported on the OCTOSPIs.
Due to arbitration and bus sharing, the auto polling interval time of the OCTOSPI, when
used, may be increased.
Minimum switching duration
The minimum number of cycles needed to switch from an OCTOSPI to another can be
configured.
This internal timer guarantees a latency between the falling edge of the REQ signal of the
active OCTOSPI, and the rising edge of the ACK signal of the requesting OCTOSPI.
The duration is defined by the REQ2ACK_TIME fields of the OCTOSPI I/O manager
configuration register (OCTOSPIM_CR).
Pin mapping in Multiplexed mode
In Multiplexed mode, the mapping of the bus is done as described below:
OCTOSPI1_nCS and OCTOSPI2_NCS work in the same way, then in
Non-multiplexed mode they have to be assigned to their respective
OCTOSPIM_Pn_NCS.
All the other signals are seen by the I/O matrix as if they were seen from OCTOSPI1.
The Multiplexed mode shall be configured when the OCTOSPIs are disabled to avoid
unexpected transactions on the bus.
OCTOSPI I/O manager (OCTOSPIM)
RM0432 Rev 6
607/2301
611

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