RM0432
DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
Figure 209. Adapted command mode usage flow
Video engine
DSI controller
Display
MSv35860V1
When the Command mode (CMDM) bit of the DSI Host mode Configuration Register
(DSI_CFGR) is set to 1, the LTDC interface assume the behavior corresponding to the
Adapted Command mode.
In this mode, the host processor can use the LTDC interface to transmit a continuous
stream of pixels to be written in the local frame buffer of the peripheral. It uses a pixel input
bus to receive the pixels and controls the flow automatically to limit the stream of continuous
pixels. When the first pixel is received, the current value of the Command Size (CMDSIZE)
field of the DSI Host LTDC Command Configuration Register (DSI_LCCR), is shadowed to
the internal interface function. The interface increments a counter on every valid pixel that is
input through the interface. When this pixel counter reaches Command Size (CMDSIZE), a
command is written into the command FIFO and the packet is ready to be transmitted
through the DSI link.
If the last pixel arrives before the counter reaches the value of shadowed Command Size
(CMDSIZE), a WMS command is issued to the command FIFO with Word Count (WC) set to
the amount of bytes that correspond to the value of the counter. If more than CMDSIZE
number of pixels are received (shadowed value), a WMS command is sent to the command
FIFO with WC set to the number of bytes that correspond to Command Size (CMDSIZE)
and the counter is restarted.
After the first WMS command has been written to the FIFO, the circuit behaves in a similar
way, but issues WMC commands instead of WMS commands. The process is repeated until
the last pixel of the image is received. The core automatically starts sending a new packet
RM0432 Rev 6
935/2301
1044
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