ST STM32L4+ Series Reference Manual page 353

RM0432
31 30 29
FPU_IE[5:0]
rw rw rw
15 14 13
Res. Res. Res. Res.
Bits 31:26 FPU_IE[5..0]: Floating point unit interrupts enable bits
FPU_IE[5]: Inexact interrupt enable
FPU_IE[4]: Input denormal interrupt enable
FPU_IE[3]: Overflow interrupt enable
FPU_IE[2]: underflow interrupt enable
FPU_IE[1]: Divide-by-zero interrupt enable
FPU_IE[0]: Invalid operation interrupt enable
Bits 25:24 Reserved, must be kept at reset value.
Bit 23 I2C4_FMP: Fast-mode Plus driving capability activation
Bit 22 I2C3_FMP: I2C3 Fast-mode Plus driving capability activation
Bit 21 I2C2_FMP: I2C2 Fast-mode Plus driving capability activation
Bit 20 I2C1_FMP: I2C1 Fast-mode Plus driving capability activation
Bit 19 I2C_PB9_FMP: Fast-mode Plus (Fm+) driving capability activation on PB9
Bit 18 I2C_PB8_FMP: Fast-mode Plus (Fm+) driving capability activation on PB8
Bit 17 I2C_PB7_FMP: Fast-mode Plus (Fm+) driving capability activation on PB7
28 27 26 25
Res.
rw rw rw
12 11 10 9
ANAS
Res. Res.
WVDD
rw
This bit enables the Fm+ driving mode on I2C4 pins selected through AF selection bits.
0: Fm+ mode is not enabled on I2C4 pins selected through AF selection bits
1: Fm+ mode is enabled on I2C4 pins selected through AF selection bits.
This bit enables the Fm+ driving mode on I2C3 pins selected through AF selection bits.
0: Fm+ mode is not enabled on I2C3 pins selected through AF selection bits
1: Fm+ mode is enabled on I2C3 pins selected through AF selection bits.
This bit enables the Fm+ driving mode on I2C2 pins selected through AF selection bits.
0: Fm+ mode is not enabled on I2C2 pins selected through AF selection bits
1: Fm+ mode is enabled on I2C2 pins selected through AF selection bits.
This bit enables the Fm+ driving mode on I2C1 pins selected through AF selection bits.
0: Fm+ mode is not enabled on I2C1 pins selected through AF selection bits
1: Fm+ mode is enabled on I2C1 pins selected through AF selection bits.
This bit enables the Fm+ driving mode for PB9.
0: PB9 pin operates in standard mode.
1: Fm+ mode enabled on PB9 pin, and the Speed control is bypassed.
This bit enables the Fm+ driving mode for PB8.
0: PB8 pin operates in standard mode.
1: Fm+ mode enabled on PB8 pin, and the Speed control is bypassed.
This bit enables the Fm+ driving mode for PB7.
0: PB7 pin operates in standard mode.
1: Fm+ mode enabled on PB7 pin, and the Speed control is bypassed.
System configuration controller (SYSCFG)
24 23 22
I2C4_ I2C3_ I2C2_
Res.
FMP FMP
rw rw
8 7 6
BOOST
Res. Res.
EN
rw
RM0432 Rev 6
21 20 19 18
I2C_ I2C_
I2C1_
PB9_ PB8_
FMP FMP
FMP FMP
rw rw rw rw
5 4 3 2
Res. Res. Res. Res.
17 16
I2C_ I2C_
PB7_ PB6_
FMP FMP
rw rw
1 0
Res. FWDIS
rc_w0
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