ST STM32L4+ Series Reference Manual page 593

RM0432
Bit 31 SIOO: Send instruction only once mode
See
0: Send instruction on every transaction
1: Send instruction only for the first command
This field can be written only when BUSY = 0.
Bit 30 Reserved, must be kept at reset value.
Bit 29 DQSE: DQS enable
This bit enables the data strobe management.
0: DQS disabled
1: DQS enabled
Bit 28 Reserved, must be kept at reset value.
Bit 27 DDTR: Data double transfer rate
This bit sets the DTR mode for the data phase.
0: DTR mode disabled for data phase
1: DTR mode enabled for data phase
This field can be written only when BUSY = 0.
Bits 26:24 DMODE[2:0]: Data mode
This field defines the data phase's mode of operation.
000: No data
001: Data on a single line
010: Data on two lines
011: Data on four lines
100: Data on eight lines
101-111: Reserved
This field can be written only when BUSY = 0.
Bits 23:22 Reserved, must be kept at reset value.
Bits 21:20 ABSIZE[1:0]: Alternate bytes size
This bit defines alternate bytes size.
00: 8-bit alternate bytes
01: 16-bit alternate bytes
10: 24-bit alternate bytes
11: 32-bit alternate bytes
This field can be written only when BUSY = 0.
Bit 19 ABDTR: Alternate bytes double transfer rate
This bit sets the DTR mode for the alternate bytes phase.
0: DTR mode disabled for alternate bytes phase
1: DTR mode enabled for alternate bytes phase
This field can be written only when BUSY = 0.
Bits 18:16 ABMODE[2:0]: Alternate-byte mode
This field defines the Alternate byte phase's mode of operation.
000: No alternate bytes
001: Alternate bytes on a single line
010: Alternate bytes on two lines
011: Alternate bytes on four lines
100: Alternate bytes on eight lines
101-111: Reserved
This field can be written only when BUSY = 0.
Sending the instruction only once
RM0432 Rev 6
Octo-SPI interface (OCTOSPI)
(SIOO). This bit has no effect when IMODE = 00.
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